The aim of the RECONF 2 project is to develop a design environment suitable for an efficient use of the dynamically reconfigurable FPGA. This new type of FPGA will make it possible to design innovative low cost architectures. That will open new application opportunities, such as implementation of adaptive computing systems.

The main targeted application domains are real time image processing, signal processing. These applications are included in most embedded systems found in aeronautic, automation, multimedia, industrial process control. Although the environment will be usable by all Real Time embedded systems manufacturers, it will represent a unique opportunity for SMEs to access this cutting-edge technology and to develop complex, high performance applications at low costs.

Please follow links below for more information:

Project presentation

Project has been presented during 16th IFAC World Congress in Prague, July 4 - 8,2005, at UTIA & IDEALIST booth.

Press Release in the Czech Language

More information about the Reconf 2 project is provided in this official press release document in the Czech language.

Rudolf Matousek on 1 Aug 2002

Press Release

More information about the Reconf 2 project is provided in this official press release. Please, don't hesitate to contact Jiri Kadlec to obtain more information.

Rudolf Matousek on 1 Aug 2002

Acronym: RECONF 2
Name: Design methodology and environment for dynamic RECONFigurable FPGA
Project No.: IST-2001-34016
Call: IST-01-7-1A
Consortium: MBDA France (coordinator)
Atmel Nantes Sa, France
Deltatec, Belgium
Kayser Italia, Srl., Italy
Technical University of Catalunya, Spain
Institute of Information Theory and Automation of the AS CR
Duration:1 March 2002 - 31 December 2004