Data Movers in DTRiMC tool for TE0726 03M 07S board


The application note describes package for evaluation of data movers with Design Time Resource integration of Model Composer DTRiMC tool. The DTRiMC tool serves for integration AXI-S IPs for Zynq device on TE0726-03M-07S board.

Due to the limited size of the PL logic, the AXI-S IPs is simple AXI-Steam 1024x32bit FIFO with AXI-S I/O connected to data movers. The data movers are generated in the DTRiMC tool by the Xilinx SDSoC 2018.2 compiler. This application note serves for description of definition of these data movers and for comparison of basic properties (area used, performance) of these data movers.

ZynqBerry TE0726-03M-07S works with Xilinx XC07007S-1C device with a single core ARM A9 32 bit processor, 512 MB of DDR3 memory and limited size of programmable logic on the single 28 nm chip. The ZynqBerry board has RaspBerryPi 2 form factor. It can be extended with RaspBerryPi 2 compatible shields. The ZynqBerry board TE0726-03M-07S is designed and manufactured by company Trenz Electronic

User SW can be cross-compiled by the g++ compiler in Xilinx SDK on Win 10 PC. The Debian utility "make" can be also used for compilation of user C++ SW on A9 processor.

The HW data communication is represented for the SW developer as a shared C++ library with simple SW API, identical for several HW data-mover alternatives generated by the Xilinx SDSoC 2018.2 compiler.

The SW developer can program the Arm host application in standard gcc or g++ compiler and "make" can be used for compilation of host applications directly on the embedded Zynq Ultrascale+ ZU03-CG-1E based system.

Data path implemented in the programmable logic of the TE0726-03M-07S board

Complete SD_Card image with Debian OS, scilab-cli, mousepad editor and debug tcf-server can be downloaded for TE0726-07S board:

Package Summary

Title Data Movers in DTRiMC tool for TE0726 03M 07S board
License AppNote_2018_2_te0726_07s_ila_DTRiMC.pdf for licensing conditions.
Package content Data movers in DTRiMC tool for TE0726-07s module. Vivado, SDSoC and SDK SW projects with evaluation examples for HW accelerated copy of data in source code. Application note in .pdf.
Size ZIP file: 254921823 Bytes
PDF file: 1221724 Bytes
Required tools
& platform
Xilinx SDSoC 2018.2, SDK 2018.2, Xilinx Lab tools 2018.2
Installation notes See AppNote_2018_2_te0726_07s_ila_DTRiMC.pdf

Result Category

Project number Year RIV category Comment
8A18013 2021 Gfunk Functional sample (demo)

Contact Person

Please, do not hesitate to contact Jiri Kadlec to obtain more information.