Adaptive Noise Canceller Demo based on the LS Lattice Filter

This adaptive noise canceller (ANC) demo presents the use of our least-square lattice (LSL) IP core. The LS lattice adaptive filter employed within the core is implemented as four-stage pipelined unit. The core operates on 16-bit two's complement integer (fixed-point) input/output data. However, the LS lattice algorithm and all other calculations are implemented in the 19-bit logarithmic number system (LNS) arithmetic. Conversions from integer to LNS representation and vice versa are integrated within the LS lattice core.

The ANC LSL demo contained in this package has been prepared for testing on two different prototyping boards:

The Celoxica RC200(E) board equipped with the Xilinx Virtex-II XC2V1000-4 FPGA.
The XESS XSV-800 board equipped with the Xilinx Virtex XCV800-4 FPGA.

The package contains:

Configuration bitstream for the RC200(E) board
Configuration files for the XSV-800 board
Example audio files
FFTScope application
XESS tools
Documentation

Contact information:

Zdenek Pohl or Milan Tichy
Department of Signal Processing
Institute of Information Theory and Automation
Academy of Sciences of the Czech Republic
Pod Vodarenskou vezi 4
182 08 Prague 8
Czech Republic
http://sp.utia.cz