Petri dish evaluation demo using the Uni1P/DX64 acceleration board.
Description
Demo application running on Uni1P/DX64 development board, using partial dynamic reconfiguration for image processing. Using code running partly in PC and partly in an FPGA, application evaluates colonies on Petri dish images. Sobel edge detector using partial dynamic reconfiguration is implemented in FPGA.Package Summary
Title | Petri dish evaluation demo using Uni1P/DX64 development board |
Filename | dish.zip |
License | Freeware |
Package content | ZIP archive with PC part of the demo, Simulink source files, accelerator bitstreams and necessary communication routines |
Size | 19281947 Bytes |
Required tools & platform |
ISE 9.1.02i_PR2, Matlab 2007a, Synplify DSP 3.6, Code Composer Studio 3.1, Microsoft Visual C++ .NET Uni1P development board and the DX64 module with Virtex-II FPGA (xc2v250-4fg256) Set of images of colonies growing on a Petri dish (black background required) |
Installation notes |
|
Result Category
Project number | Contract section | Year | RIV category | Comment |
1ET400750408 | 2.3 | 2009 | S | SW |