Floating Point Accelerators for MicroBlaze - Partial Runtime Reconfiguration

Description

The Floating Point Accelerators for MicroBlaze - Partial Runtime Reconfiguration demo presents the UTIA HW platform with one reconfigurable area.

Inside the reconfigurable area can be swapped on the fly two types of the floating point accelerator:

  • single precision floating point SIMD accelerator (2x ADD, 2x MUL),
  • double precision floating point accelerator (1x ADD, 1x MUL).
The demo in this package has been prepared for testing on the Xilinx ML402 prototyping board equipped with the Xilinx Virtex4 XC4VSX35 FPGA.

Package Summary

Title UTIA HW platform extended with partial runtime reconfiguration package
Filename utia_hw_platform_PR.zip
License Freeware
Package content ZIP archive with System ACE file and partial bitfiles
Size 1687656 Bytes
MD5 checksum 63d95227452581d1dceafb72fadbd4c1
Required tools
& platform
Software terminal (OS dependent),
Xilinx ML402 board
Installation notes
  • Download package
  • Unzip package
  • See the 'readme.txt' file in the package for the application start

Result Category

Project number Contract section Year RIV category Comment
FP6-IST-027611 SP1 3 S Functional sample (demo)

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Contact Person

Please, don't hesitate to contact Lukas Kohout to obtain more information.