DTRiMC tool for TE0820-03-4EV-1E module on TE0701-06 carrier board


The application note describes evaluation package for the Design Time Resource integration of Model Composer DTRiMC tool. It serves for integration of 8xSIMD, FP03x8, floating-point, run-time-reconfigurable accelerators for Zynq Ultrascale+ TE0820-03-4EV-1E module on TEBF0820 carrier board.

Architecture of 8xSIMD FP01x8 accelerator for ArduZynq schield

This application note describes UTIA support for the evaluation version of two serial connected 8xSIMD FP03x8 floating-point, run-time-reconfigurable accelerators for Zynq Ultrascale+ TE0820 module on TE0701 carrier board. The TE0820 module and TE0701 carrier board are designed and manufactured by the company Trenz Electronic.

SW developer can program application without SDSoC 2018.2 compiler license. The standard g++ compiler and "make" can be also used in Win 10 PC or in Debian OS on Arm.

The two serial connected FP03x8 accelerators and the HW data movers supporting data communication are represented for the SW developer as shared C++ library with simple SW API. The API is identical for several alternatives of HW data movers.

The evaluation package provides several pre-compiled HW designs represented in form of SD-cards containing these designs and API interface for SW developer in form of shared Debian libraries for Arm host processor.

The SW developer can program the Arm host application in standard gcc or g++ compiler and "make" can be used for compilation of host applications directly on the embedded Zynq Ultrascale+ ZU04-EV-1E based system.

ArduZynq shield with evaluation version of FP01x8 accelerator

Package Summary

Title DTRiMC tool for TE0820-03-4EV-1E module on TE0701-06 carrier board
Download TS82fp03x8_TE0701_DTRiMC_zu4ev.zip
License AppNote_2018_2_te0820_fp03x8_1x2_ila_DTRiMC_zu4ev.pdf for licensing conditions.
Package content DTRiMC for TE0820-03-4EV-1E module. SDK SW projects with evaluation examples for two 8xSIMD FP03x8 accelerators in source code. Application note in .pdf. Evaluation version of HW accelerators is included only in procompiled bitstream.
Size ZIP file: 1313257864 Bytes
PDF file: 3335199 Bytes
Required tools
& platform
Xilinx SDK 2018.2, Xilinx Lab tools 2018.2
Installation notes See AppNote_2018_2_te0820_fp03x8_1x2_ila_DTRiMC_zu4ev.pdf

Result Category

Project number Year RIV category Comment
8A18013 2021 Gfunk Functional sample (demo)

Contact Person

Please, do not hesitate to contact Jiri Kadlec to obtain more information.