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Results

2019

• Benchmarks for STM32H7 MCUs

• Industrial 40 nm Demonstrator NUCLEO STM32H755ZI-Q

• Evaluation version of 8xSIMD FP01x8 accelerator for ArduZynq shield

• FP01x8 Accelerator on TE0726-03M

• Two serial connected evaluation versions of FP03x8 accelerators for TE0820-03-4EV-1E module on TE0701-06 carrier board

• UTIA Evaluation Board v1.7 v1.8 Beamforming Demo

• UTIA evBoard v1.0 Beamforming Demo

• STM32 Nucleo-H743ZI with Adafruit 1.8" TFT Shield V2

• Design Time and Run Time Resources for the ZynqBerry Board TE0726-03M with SDSoC 2018.2 Support

• Design Time and Run Time Resources for Zynq Ultrascale+ TE0808-04-15EG-1EE with SDSoC 2018.2 Support

• Design Time and Run Time Resources for Zynq Ultrascale+ TE0820-03-4EV-1E with SDSoC 2018.2 Support

• Video Input/Output IP Cores for TE0820 SoM with TE0701 Carrier and and Avnet HDMI Input/Output FMC Module

• Video Input/Output IP Cores for Xilinx ZCU102 with Avnet HDMI Input/Output FMC Module

• Arrowhead Compatible Zynq with SDSoC 2017.4 and Floating-Point 8xSIMD EdkDSP Accelerators

• Arrowhead client on Zynq 7000 device with support for the Xilinx SDSoC 2018.2 HW accelerators

• Arrowhead Client on ZynqBerry Installation for Win7, Win10 and Ubuntu 16.04 LTS

• Arrowhead Compatible Zynq Ultrascale+ Systems with Xilinx SDSoC 2018.2 Support

• SILENSE TE0706+TE0720 Ultrasound Capture Platform with Example Application

2018

• Noise Cancellation Using QRD RLS Algorithms

• Simple Gesture Detector Based on TE0706 with TE0720-2IF and Ultrasonic Range Finder PmodMAXSONAR

• Compact Zynq System 2017.4 with SW-defined Floating-Point 8xSIMD EdkDSP Accelerator

• Stereo Demo

• Live Canny Edge Detection Demo for TE0808+TEBF0808 Trenz Board

• Compact Zynq System 2017.1 with SW-defined Floating-Point 8xSIMD EdkDSP Accelerator

• SW Defined Floating Point 8xSIMD EdkDSP IP Serving for Adaptive Noise Cancellation

• Video Processing Demonstrator with Full HD Sensor and 8xSIMD EdkDSP Accelerator IP Core

2017

• Remote Terminal for Dense Optical Flow Demonstrator Using Python 1300 Camera Module

• Adaptive RLS Algorithms Reference Implementations for 32 bit Win7

• Adaptive RLS Algorithms Reference Implementations

• Remote Terminal for Python 1300 Camera Module

• SDK 2015.4 Projects for Evaluation of HW Accelerated Video Processing with Python 1300 Sensor and (8xSIMD) EdkDSP Accelerator on TE0720-03-2IF Module and TE0701-06 Carrier

• Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-30-1 SoM on EMC2-DP-V2 Carrier

• Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-04-30-3E SoM on TE0701-06 Carrier

• Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-30-1 SoM on TE0701-06 Carrier

2016

• APCP Image Processing Demos

• SDSoC 2015.4 Standalone BSP with Full HD HDMI In-Out SW and HW Demos for Automotive Zynq TE0720-03-1QF Module or Commercial Zynq TE0720-03-1CF Module on TE0701-05 Carrier Board

• SDSoC 2015.4 Standalone BSP with Full HD HDMI In-Out SW and HW Demos for Zynq System-on-Module TE0720-03-2IF and TE0701-05 Carrier Board

• SDSoC 2015.4 Standalone BSP with Full HD HDMI In-Out with SW and HW Demos for Zynq System-on-Module TE0715-03-30 and Sundance EMC2-DP-V2 Platform

• Python 1300 Sensor Video Processing in HW with EdkDSP 8xSIMD Accelerator for TE0720-03-2IF SoM on TE0701-05 Carrier

• Full HD HDMI In-Out HW-Accelerated Demos for Zynq System-on-Module TE0720-03-2IF and TE0701-05 Carrier Board

• ALMARVI Python Camera Platform

• Full HD HDMI In-Out HW-Accelerated Demos for Zynq System-on-Module TE0715-03-30-1I and Sundance EMC2-DP-V2 Platform

• EMC²-DP HDMI in HDMI out Platform

• Asymmetric Multiprocessing with MicroBlaze, EdkDSP Accelerator and Toshiba Sensor Video Processing for low cost Zynq on TE0720-03-1CF SoM on TE0701-05 Carrier

• Asymmetric Multiprocessing with MicroBlaze, EdkDSP Accelerator and Toshiba Sensor Video for Automotive grade Zynq on TE0720-03-1QF SoM on TE0701-05 Carrier

• Full HD Toshiba Video Sensor Platform with Automotive Grade Arm Zynq on TE0720-03-1QF SoM on TE0701-05 Carrier

• Zynq Platform with UTIA EdkDSP Accelerator and Toshiba Sensor Video Processing in HW for TE0720-03-2IF SoM on TE0701-05 Carrier

• Toshiba Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier

• Python 1300 Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier

• Camera to Touchscreen Demonstration for MicroZed 7020 carrier board, Avnet 7-inch Zed Touch Display and Avnet Toshiba Industrial 1080P60 Camera Module

2015

• eMMC AXIS Controller Interfacing MTFC32GJWDQ-4M 32 GB Memory on Xilinx KC705 Board

• eMMC AXIS Controller Interfacing MTFC32GJWDQ-4M 32 GB Memory on Xilinx ZC702 Board

• Xilinx Vivado 2014.4, Xilinx SDK 2014.4, Xilinx AC701 development board

• Evaluation of Asymmetric Multiprocessing for Zynq System-on-Modules TE0720-02-2IF, TE0720-02-1CF, TE0720-02-1QF with Carrier Board TE0701-05

• Video Input/Output Demonstration for Trenz TE0701-05, TE0720-02-1CF, TE0720-02-1QF, TE0720-02-2IF and Avnet HDMI Input/Output FMC Module

• 3D Anaglyph Demo

• Dynamic Programmable Logic Reconfiguration for Zynq

2014

• UTIA EdkDSP Demonstrator in Xilinx 3S700AN FPGA with Embedded FLASH and NV RAM

• Interfacing e·MMC 32 GB Memory MTFC32GJWDQ-4M with Xilinx ZC702 FPGA Board

• Computation and Communication Blocks for Xilinx Kintex7 FPGA with UTIA EdkDSP Accelerators. Vivado 2013.4 Designs with SW Demos.

• Asymmetric Multiprocessing on ZYNQ ZC702 board with EdkDSP Accelerators for Xilinx Vivado 2013.4 Design Flow

• Internet of Things Building Blocks for Xilinx Artix7 FPGA with UTIA EdkDSP Accelerators. Vivado 2013.4 Designs with SW Demos.

• Asymmetric Multiprocessing on ZYNQ with EdkDSP accelerators on Xilinx ZC702 board - ISE 14.5

• UTIA EdkDSP Platform Demonstrator on Xilinx SP605 Board PLB Bus

• Simulation of Motion Recognition in Low Resolution Images

2012

• Optimizing C Compiler and an ELF-Based Toolchain for the PicoBlaze Processor

• UTLEON 3 Exploring Fine-Grain Multi-Threading in FPGAs

2011

• Resource Managment: Implementation and performance results

• DSP Library for UTIA BCE platform architecture

• Yeast Colony Counter

2009

• Simulator of Physical Layer of the ADSL Modem

• RIPAC Frontend - Preparing blocks in Simulink

• Application handbook for the Uni1P development board and for the DX64 modules

• Fault Injection into Emulated ASIC Netlists Using Partial Runtime Reconfiguration of FPGA

• RETAC Demo - Fault Emulator v2.0

• Tool for Preparation of Emulation of Time-Annotated ASIC Netlists

• Application of CUDA in DSP: Implementation of FIR filter and Cross Ambiguity Function

• Self-Adaptive LMS Filter Demo

• Reed-Solomon Coder Simulation

• DVB-T2 Receiver: Physical Layer Simulator

• DVB-T2 Receiver Prototype: Physical Layer

• Counting of yeast colonies in Petri dish images

• Yeaster - Software for estimation of quantitative characteristics of yeast colonies

• Preprocessing of images of Petri dishes

• Petri dish evaluation demo using the Uni1P/DX64 acceleration board

2008

• Image Compression Algorithms

• RCCOM - Toolbox for supporting communication with FPGA development boards from Matlab/Simulink

• Corner detection

• Accelerator for Computation ADSL Line Response

• Implementation of Accelerators for Decoding Reed-Solomon and Convolution error-correcting code on FPGA

• Adaptive Noise Canceller Migration Demo

• Peripheral Controllers for Spartan3E Starter Kit Development Board

• Floating Point Accelerators for MicroBlaze - Partial Runtime Reconfiguration

2007

• HSLA version 3.0.0 evaluation package

• Adaptive Noise Canceller LS Lattice Demo

• Accelerator for Cross Ambiguity Function for Modern Passive Coherent Locator Systems