The goal of the project is to set up tools enabling to speed-up design of systems using hardware acceleration of image and video processing algorithms, with the intention to facilitate industrial application of the advanced, computationally intensive algorithms in this field.

Libraries of hardware and DSP macros of selected algorithms and their simulation equivalents will be developed in the project. A possibility to exploit dynamic FPGA reconfiguration for implementation of algorithms will be investigated - building on the results of the RECONF project, previously solved in the laboratory of proposer. An architecture of a multi-level environment for rapid application design and configuration, using these libraries, will also be examined. This environment, should, at the lower level, use relatively simple scripting language and, at the higher level, some rapid development tool. We assume the Matlab/Simulink environemnt and/or the high-level HW-oriented languages (HandelC, SystemC).

Name: Rapid prototyping tools for development of HW-accelerated embedded image- and video-processing applications
Provider: Academy of Sciences of the Czech Republic
Project No.: 1ET400750408
Consortium: Institute of Information Theory and Automation of the CAS
Faculty of Information Technology, BUT Brno
Duration: July 2004 - December 2008

Project presentations

Project has been presented during
  • 16th IFAC World Congress in Prague, July 4 - 8,2005, at UTIA & IDEALIST booth. (project presentation)
  • 3rd Annual ARTEMIS Conference in Graz, 23-24 May 2006, at UTIA booth
  • IST2006 event in Helsinki, 21-23 November 2006, at the PicoNet stand

Project results