Our group focuses on research, development and implementation of advanced digital signal processing algorithms, mainly in the fields of adaptive control and audio processing. We build on our experience with statistics, namely with the Bayesian approach to system identification and modeling, as well as the relevant fields of linear algebra.
Our target platforms are Field Programmable Gate Arrays (FPGAs) and Digital Signal Processors (DSPs). We use Matlab/Simulink to specify, model and verify algorithms that we later convert and synthesize to HW. As such specialized solutions are likely to be used in embedded systems, we also research features that result in extremely fast execution, use small amount of memory, small chip area or low power consumption. We achieve this both through designing new or modifying existing DSP algorithms, and using architectural properties such as dynamic reconfiguration of FPGAs...
Presentation at SAMOS 2015 conference
SAMOS XV conference was held in Agios Konstantinos, Samos Island, Greece 20 – 23 July 2015. We have presented paper Video Chain Demonstrator on Xilinx Kintex7 FPGA with EdkDSP Floating Point Accelerators. Slides.
UTIA Presentation at IPSOC 2014 conference
Our group presented recent results at the IPSOC 2014 conference held in Grenoble 4 - 6 November 2014. At the Things2Do project booth, we presented a poster describing the evaluation design on Artix7 FPGA and the related design flow in the Xilinx Vivado 2013.4 IP Integrator.
UTIA Presentation at EMC2 Market Place
Our group is a member of the consortium of the ENIAC KET Pilot Line project called PANACHE. The project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative μcontrollers in Europe. The Kick-off meeting was held at STMicroelectronics on June 25, 2014 in Crolles, France. More information can be found here.
Our group takes part in the ENIAC KET Pilot Line project called Things2Do. This project is building the Design and Development Ecosystem for FD-SOI-technology. The Kick-off meeting took place at STMicroelectronics on June 20, 2014 in Grenoble, France. Detailed information can be found here and on the project website.
Our group participates in the ARTEMIS Innovation Pilot Programme project EMC2. The project finds solutions for dynamic adaptability in open systems, provides handling of mixed criticality applications under real-time conditions, scalability and utmost flexibility, full scale deployment and management of integrated tool chains, through the entire lifecycle. The EMC2 project objective is to establish Multi-Core technology in all relevant Embedded Systems domains. More information can be found here and on the project website.