Profile
Our group focuses on research, development and implementation of advanced digital signal processing algorithms, mainly in the fields of adaptive control and audio processing. We build on our experience with statistics, namely with the Bayesian approach to system identification and modeling, as well as the relevant fields of linear algebra.
Our target platforms are Field Programmable Gate Arrays (FPGAs) and Digital Signal Processors (DSPs). We use Matlab/Simulink to specify, model and verify algorithms that we later convert and synthesize to HW. As such specialized solutions are likely to be used in embedded systems, we also research features that result in extremely fast execution, use small amount of memory, small chip area or low power consumption. We achieve this both through designing new or modifying existing DSP algorithms, and using architectural properties such as dynamic reconfiguration of FPGAs...
News
FPL2010
Our group will present a poster at the FPL2010 conference. The poster title is "Reducing Power Consumption of Embedded DSP Platform through Clock-Gating Technique". The presentation will take place in Milano on September 1.
UTLEON3 presented at DDECS2010
Our group will present an implementation of a modified LEON3 processor with a hardware support for micro-threading at the DDECS2010 conference in Vienna next Thursday. The work has been supported by the European Commission within the Apple-CORE project.
Screen Service and UTIA Cooperation on a DVB-T2 Receiver
Screen Service and UTIA successfully completed a research project in which UTIA developed digital signal processing algorithms and designed a specialized hardware for the DVB-T2 receiver, a new generation of digital terrestrial television. For more information see the press release.
FET Conference 2009
Our group presented a poster on today's applications of logarithmic arithmetic, and demonstrated an architecture for an efficient implementation of flexible DSP architecture in FPGAs together with a software application for measuring characteristics of yeast colonies for biology at the FET Conference (FET09), organized jointly by the European Commission, the Czech Academy of Sciences and the Czech Technical University. Although the conference is over now, you can still visit our virtual booth here.
The FPL2009 Conference
Our department is involved in the organization of this year's FPL conference, the first and largest conference on field-programmable logic, held annually in Europe. FPL2009 will take place in Prague from August 31 till September 2. To see the call for papers and other details visit the FPL2009 web page.
ARTEMIS & ENIAC JTI Info-day 2nd March 09 in UTIA
OKO-ICT Branch Contact Organization prepared ARTEMIS & ENIAC Joint Technology Initiatives Call 2009 information workshop.
Presentations can be download
here.